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nathalies power_estimation [37 articles]

Neue Publikationen in nathalies Bibliothek eingetragen unter dem Bezeichner: power_estimation. You can also see everyone's power_estimation.
  • Design Techniques to Reduce Power Consumption
    XCell Jornal (Quarter 3 2005)
    by Arthur Yang
    posted to for_thesis fpga power power_estimation xilinx by nathalie on 2006-09-02 01:01:20 as ** along with 1 person ceegrs2
  • Power-aware Technology Mapping for LUT-based FPGAs
    Field-Programmable Technology, 2002. (FPT). Proceedings. 2002 IEEE International Conference on (2002), pp. 211-218.
    by JH Anderson, FN Najm
    posted to activity algorithms for_thesis fpl_paper fpt_paper logic_synthesis lut power power_estimation probability technology_mapping xilinx by nathalie on 2006-09-01 06:55:25 as ** along with 1 person ceegrs2
  • Dynamic Voltage Scaling for Commercial FPGAs
    Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology (2005), pp. 173-180.
    by CT Chow, LSM Tsui, PHW Leong, W Luk, SJE Wilton
    posted to altera architecture for_thesis fpga fpl_paper fpt_paper power power_estimation vlsi xilinx by nathalie on 2006-09-01 06:46:27 as ** along with 2 people reactgary ceegrs2
  • The Design of a Low Energy FPGA
    Low Power Electronics and Design, 1999. Proceedings. 1999 International Symposium on (1999), pp. 188-193.
    by V George, Hui Zhang, J Rabaey
    posted to architecture for_thesis fpga interconnect lut power power_estimation power_measurement routing xilinx by nathalie on 2006-09-01 01:45:28 as **
  • Low-power High-level Synthesis for FPGA Architectures
    Low Power Electronics and Design, 2003. ISLPED '03. Proceedings of the 2003 International Symposium on (2003), pp. 134-139.
    by Deming Chen, J Cong, Yiping Fan
    posted to activity fpga interconnect power power_estimation synthesis by nathalie on 2006-09-01 01:34:03 as **
  • Power Estimation Techniques for FPGAs
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 12, No. 10. (2004), pp. 1015-1027.
    by JH Anderson, FN Najm
    posted to activity for_thesis fpga interconnect power power_estimation vlsi xilinx by nathalie on 2006-09-01 01:12:59 as ** along with 1 person ceegrs2
  • Practical Low Power Digital VLSI Design
    (01 August 1997)
    by Gary K Yeap
    posted to activity for_thesis lag_one power power_estimation probability transition_density vlsi by nathalie on 2006-08-31 00:49:32 as ** along with 1 person philip-eecs
  • Low Power CMOS Circuits: Technology, Logic Design and CAD Tools
    (2006)
    edited by Christian Piguet
    posted to arithmetic digital_logic for_thesis power power_estimation vlsi by nathalie on 2006-08-31 00:46:09 as **
  • Switching Activity Analysis Considering Spatioternporal Correlations
    Computer-Aided Design, 1994., IEEE/ACM International Conference on (1994), pp. 294-299.
    by R Marculescu, D Marculescu, M Pedram
    posted to activity for_thesis lag_one power power_estimation probability transition_density by nathalie on 2006-08-31 00:26:37 as **
  • A survey of power estimation techniques in VLSI circuits
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, Vol. 2, No. 4. (1994), pp. 446-455.
    by FN Najm
    posted to vlsi for_thesis power power_estimation printed probability by nathalie on 2006-08-30 04:23:09 as read along with 1 person ceegrs2
  • Berkeley Logic Interchange Format
    (6 September 1996)
    posted to for_thesis fpga placement power_estimation by nathalie on 2006-08-11 23:41:45 as **
  • HHVPR Manual
    (18 July 2005)
    by SJE Wilton
    posted to architecture arithmetic dsp for_thesis memory multiplier power power_estimation printed by nathalie on 2006-08-11 23:28:30 as read
  • Transition density: a new measure of activity in digital circuits
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, Vol. 12, No. 2. (1993), pp. 310-323.
    by FN Najm
    posted to activity for_thesis fpl_paper fpt_paper power_estimation printed transition_density vlsi by nathalie on 2006-07-06 19:31:29 as **
  • Activity Estimation For Field-Programmable Gate Arrays
    (August 2006)
    by J Lamoureux, SJE Wilton
    posted to activity for_thesis fpl_paper fpt_paper power_estimation by nathalie on 2006-06-23 18:26:30 as ***
  • Power modeling and characteristics of field programmable gate arrays
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, Vol. 24, No. 11. (2005), pp. 1712-1724.
    by Fei Li, Y Lin, Lei He, Deming Chen, J Cong
    posted to for_thesis fpga power power_estimation printed by nathalie on 2006-04-27 19:43:42 as ***** along with 1 person ceegrs2
  • PowerPlay Power Analyzer
    Vol. 3 (October 2005)
    by Altera
    posted to altera for_thesis fpga power power_estimation by nathalie on 2006-04-27 18:59:47 as **
  • notes Xilinx Development System Reference Guide 8.1i
    (09 December 2005)
    by Xilinx
    posted to for_thesis fpga power_estimation xilinx by nathalie on 2006-04-27 18:37:44 as **
  • PowerPlay Early Power Estimator User Guide for Stratix, Stratix GX, and Cyclone FPGAs
    (October 2005)
    by Altera
    posted to altera for_thesis fpga power power_estimation by nathalie on 2006-04-27 17:29:48 as **
  • PowerPlay Early Power Estimator User Guide for Stratix II, Stratix II GX and Hardcopy II
    (December 2005)
    by Altera
    posted to altera for_thesis fpga power power_estimation by nathalie on 2006-04-27 17:19:10 as **
  • notes Xilinx Web Power Tools
    (27 April 2006)
    by Xilinx
    posted to for_thesis fpga power power_estimation xilinx by nathalie on 2006-04-27 16:57:28 as **
  • notes Virtex-4 XPower - Early Power Estimator v8.1
    (27 April 2006)
    by Xilinx
    posted to for_thesis fpga power_estimation xilinx by nathalie on 2006-04-27 16:11:12 as **
  • Power Estimation for Field Programmable Gate Arrays
    (August 2002)
    by Kara K Poon
    posted to for_thesis fpga power power_estimation by nathalie on 2006-04-25 22:00:08 as **
  • Theoretical Analysis of Word-Level Switching Activity in the Presence of Glitching and Correlation
    (1999)
    by Janardhan H Satyanarayana, Keshab K Parhi
    posted to arithmetic dsp for_thesis multiplier power power_estimation by nathalie on 2006-04-18 16:58:07 as **
  • Information theoretic measures for power analysis [logic design]
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, Vol. 15, No. 6. (1996), pp. 599-610.
    by D Marculescu, R Marculescu, M Pedram
    posted to for_thesis fpl_paper power power_estimation printed by nathalie on 2006-03-11 07:01:07 as **
  • High-Level Power Analysis and Optimization
    (June 1997)
    by Anand Raghunathan
    posted to fpl_paper power power_estimation synthesis by nathalie on 2006-03-11 06:06:26 as **
  • High-Level Power Analysis and Optimization
    (30 November 1997)
    by Anand Raghunathan, Niraj K Jha, Sujit Dey
    posted to for_thesis fpl_paper power power_estimation synthesis by nathalie on 2006-03-11 05:49:23 as **
  • notes High-level power modeling, estimation, and optimization
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, Vol. 17, No. 11. (1998), pp. 1061-1079.
    by E Macii, M Pedram, F Somenzi
    posted to for_thesis power power_estimation printed by nathalie on 2006-03-05 06:30:58 as *****
  • Architectural power analysis: The dual bit type method
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, Vol. 3, No. 2. (1995), pp. 173-187.
    by PE Landman, JM Rabaey
    posted to adder architecture arithmetic for_thesis fpl_paper multiplier power power_estimation printed by nathalie on 2006-03-05 02:24:58 as read along with 1 person ceegrs2
  • notes Synthesis of low power linear DSP circuits using activity metrics
    VLSI Design, 1994., Proceedings of the Seventh International Conference on (1994), pp. 265-270.
    by A Chatterjee, RK Roy
    posted to adder arithmetic dsp multiplier power power_estimation printed synthesis by nathalie on 2006-03-05 01:39:45 as read
  • Register-transfer level estimation techniques for switching activity and power consumption
    (1996), pp. 158-165.
    by Anand Raghunathan, Sujit Dey, Niraj K Jha
    posted to power power_estimation printed by nathalie on 2006-03-04 08:36:12 as ****
  • Dynamic power consumption in Virtex&\#8482;-II FPGA family
    (2002), pp. 157-164.
    by Li Shang, Alireza S Kaviani, Kusuma Bathala
    posted to for_thesis fpga fpl_paper power power_estimation power_measurement printed xilinx by nathalie on 2005-05-13 00:09:54 as ** along with 1 person ceegrs2
  • XAPP158: Powering Xilinx FPGAs
    (5 August 2002)
    by A Lesea, M Alexander
    posted to fpga power power_estimation xilinx by nathalie on 2005-05-09 23:00:16 as **
  • A Detailed Power Model for Field-Programmable Gate Arrays
    ACM Transactions on Design Automation of Electronic Systems (TODAES)
    by KKW Poon, SJE Wilton, A Yan
    posted to for_thesis fpga fpl_paper power power_estimation printed by nathalie on 2005-05-09 19:33:27 as ***
  • Power Estimation for Field- Programmable Gate Arrays
    (2002)
    by Kara KW Poon
    posted to fpga power power_estimation by nathalie on 2005-05-09 19:26:38 as **
  • A Flexible Power Model for FPGAs
    (2002), pp. 312-321.
    by Kara KW Poon, Andy Yan, Steven JE Wilton
    posted to fpga power power_estimation printed by nathalie on 2005-05-09 19:22:44 as ***
  • Sensitivity of FPGA power evaluation
    Field-Programmable Technology, 2002. (FPT). Proceedings. 2002 IEEE International Conference on (2002), pp. 441-442.
    by K Poon, S Wilton
    posted to fpga power power_estimation by nathalie on 2005-05-09 19:21:08 as **
  • Power estimation and power measurement of Xilinx Virtex FPGAs: trade-offs and limitations
    Integrated Circuits and Systems Design, 2003. SBCCI 2003. Proceedings. 16th Symposium on (2003), pp. 283-288.
    by J Becker, M Huebner, M Ullmann
    posted to fpga power power_estimation power_measurement printed xilinx by nathalie on 2005-05-09 19:14:02 as *
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