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nathalies altera [16 articles]

Neue Publikationen in nathalies Bibliothek eingetragen unter dem Bezeichner: altera. You can also see everyone's altera.
  • Dynamic Voltage Scaling for Commercial FPGAs
    Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology (2005), pp. 173-180.
    by CT Chow, LSM Tsui, PHW Leong, W Luk, SJE Wilton
    posted to altera architecture for_thesis fpga fpl_paper fpt_paper power power_estimation vlsi xilinx by nathalie on 2006-09-01 06:46:27 as ** along with 2 people reactgary ceegrs2
  • Power-aware RAM Mapping for FPGA Embedded Memory Blocks
    (2006), pp. 189-198.
    by Russell Tessier, Vaughn Betz, David Neto, Thiagaraja Gopalsamy
    posted to activity algorithms altera for_thesis fpga logic_synthesis memory power by nathalie on 2006-09-01 05:55:51 as ** along with 1 person ceegrs2
  • Measuring the Gap Between FPGAs and ASICs
    (2006), pp. 21-30.
    by Ian Kuon, Jonathan Rose
    posted to altera area asic benchmarks for_thesis fpga leakage performance power xilinx by nathalie on 2006-09-01 05:24:19 as ** along with 2 people ceegrs2 JonsonXP
  • Fundamentals of Digital Logic with Verilog Design
    (20 August 2002)
    by Stephen Brown, Zvonko Vranesic
    posted to altera digital_logic for_thesis fpga by nathalie on 2006-08-29 06:31:28 as **
  • Directional and single-driver wires in FPGA interconnect
    Field-Programmable Technology, 2004. Proceedings. 2004 IEEE International Conference on (2004), pp. 41-48.
    by G Lemieux, E Lee, M Tom, A Yu
    posted to altera architecture for_thesis fpga interconnect routing xilinx by nathalie on 2006-08-28 04:10:16 as **
  • PowerPlay Power Analyzer
    Vol. 3 (October 2005)
    by Altera
    posted to altera for_thesis fpga power power_estimation by nathalie on 2006-04-27 18:59:47 as **
  • PowerPlay Early Power Estimator User Guide for Stratix, Stratix GX, and Cyclone FPGAs
    (October 2005)
    by Altera
    posted to altera for_thesis fpga power power_estimation by nathalie on 2006-04-27 17:29:48 as **
  • PowerPlay Early Power Estimator User Guide for Stratix II, Stratix II GX and Hardcopy II
    (December 2005)
    by Altera
    posted to altera for_thesis fpga power power_estimation by nathalie on 2006-04-27 17:19:10 as **
  • Stratix II Device Handbook
    (2005)
    by Altera
    posted to altera for_thesis fpga by nathalie on 2006-04-27 15:34:49 as **
  • A verilog RTL synthesis tool for heterogeneous FPGAs
    Field Programmable Logic and Applications, 2005. International Conference on (2005), pp. 305-310.
    by P Jamieson, J Rose
    posted to altera arithmetic coarse_grained_architectures dsp for_thesis fpga fpl_paper logic_synthesis printed synthesis technology_mapping by nathalie on 2006-02-19 21:11:59 as read
  • A reconfigurable multiplier array for video image processing tasks, suitable for embedding in an FPGA structure
    FPGAs for Custom Computing Machines, 1998. Proceedings. IEEE Symposium on (1998), pp. 226-234.
    by SD Haynes, PYK Cheung
    posted to altera architecture arithmetic embedded for_thesis fpga fpl_paper image_processing multiplier printed xilinx by nathalie on 2006-01-10 23:48:14 as read
  • The effect of LUT and cluster size on deep-submicron FPGA performance and density
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, Vol. 12, No. 3. (2004), pp. 288-298.
    by E Ahmed, J Rose
    posted to altera architecture area clustering deep_submicron fpga lut performance printed by nathalie on 2005-12-20 05:12:58 as ***
  • High-performance carry chains for FPGAs
    (1998), pp. 223-233.
    by Scott Hauck, Matthew M Hosler, Thomas W Fry
    posted to adder altera architecture arithmetic for_thesis fpga fpl_paper printed by nathalie on 2005-12-07 20:07:41 as ***
  • Flexible reconfigurable multiplier blocks suitable for enhancing the architecture of FPGAs
    Custom Integrated Circuits, 1999. Proceedings of the IEEE 1999 (1999), pp. 191-194.
    by SD Haynes, AB Ferrari, PYK Cheung
    posted to altera architecture arithmetic for_thesis fpga fpl_paper multiplier printed xilinx by nathalie on 2005-06-22 06:32:37 as **
  • The stratix routing and logic architecture
    (2003), pp. 12-20.
    by David Lewis, Vaughn Betz, David Jefferson, Andy Lee, Chris Lane, Paul Leventis, Sandy Marquardt, Cameron Mcclintock, Bruce Pedersen, Giles Powell, Srinivas Reddy, Chris Wysocki, Richard Cliff, Jonathan Rose
    posted to altera architecture fpga interconnect printed routing by nathalie on 2005-05-12 23:15:57 as **
  • The Stratix II logic and routing architecture
    (2005), pp. 14-20.
    by David Lewis, Elias Ahmed, Gregg Baeckler, Vaughn Betz, Mark Bourgeault, David Cashman, David Galloway, Mike Hutton, Chris Lane, Andy Lee, Paul Leventis, Sandy Marquardt, Cameron Mcclintock, Ketan Padalia, Bruce Pedersen, Giles Powell, Boris Ratchev, Srinivas Reddy, Jay Schleicher, Kevin Stevens, Richard Yuan, Richard Cliff, Jonathan Rose
    posted to altera architecture fpga interconnect printed routing by nathalie on 2005-05-12 22:18:40 as **
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