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Tag fpga [386 articles]

Recent papers classified by the tag fpga.
  • A Novel Watermarking Technique for LUT Based FPGA Designs
    Field-Programmable Logic and Applications. Reconfigurable Computing Is Going Mainstream 12th International Conference, FPL 2002, Montpellier, France September 2-4, 2002. Proceedings (2002), pp. 21-47.
    by Dylan Carline, Paul Coulton
    posted to fpga watermarking by wongmld on 2008-01-10 02:31:00 as **
  • A 21.54 Gbits/s fully pipelined AES processor on FPGA
    Field-Programmable Custom Computing Machines, 2004. FCCM 2004. 12th Annual IEEE Symposium on (2004), pp. 308-309.
    posted to aes fpga by wongmld on 2008-05-16 02:24:49 as **
  • Efficient AES Implementations on ASICs and FPGAs
    Advanced Encryption Standard – AES (2005), pp. 98-112.
    by Norbert Pramstaller, Stefan Mangard, Sandra Dominikus, Johannes Wolkerstorfer
    posted to aes fpga by wongmld on 2008-01-10 02:27:19 as **
  • A Compact Rijndael Hardware Architecture with S-Box Optimization
    Advances in Cryptology — ASIACRYPT 2001 (2001), pp. 239-254.
    by Akashi Satoh, Sumio Morioka, Kohji Takano, Seiji Munetoh
    posted to aes fpga by wongmld on 2008-05-16 02:19:43 as read
  • 4.2 Gbit/s single-chip FPGA implementation of AES algorithm
    Electronics Letters, Vol. 39, No. 15. (2003), pp. 1115-1116.
    posted to aes fpga by wongmld on 2008-01-10 02:35:56 as ** along with 1 person deepaka
  • A Very Compact S-Box for AES
    Cryptographic Hardware and Embedded Systems – CHES 2005 (2005), pp. 441-455.
    posted to aes fpga by wongmld on 2008-05-16 02:21:41 as ***
  • The diversity study of AES on FPGA application
    Field-Programmable Technology, 2002. (FPT). Proceedings. 2002 IEEE International Conference on (2002), pp. 390-393.
    by MH Jing, CH Hsu, TK Truong, YH Chen, YT Chang
    posted to aes fpga by wongmld on 2008-01-10 02:28:38 as **
  • AES on FPGA from the Fastest to the Smallest
    Cryptographic Hardware and Embedded Systems – CHES 2005 (2005), pp. 427-440.
    by Tim Good, Mohammed Benaissa
    posted to aes fpga by wongmld on 2008-05-16 02:25:54 as *****
  • An approach to scalable molecular dynamics simulation using supercomputing adaptive processing elements
    Field Programmable Logic and Applications, 2005. International Conference on (2005), pp. 711-712.
    by LE Cordova, DA Buell
    posted to fpga hpc md by voronov on 2008-03-11 19:01:45 as **
  • Hardware/Software Approach to Molecular Dynamics on Reconfigurable Computers
    (2006), pp. 23-34.
    by Ronald Scrofano, Maya Gokhale, Frans Trouw, Viktor K Prasanna
    posted to fpga hpc md by voronov on 2008-03-12 17:00:08 as **
  • Highly efficient, limited range multipliers for LUT-based FPGA architectures
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, Vol. 12, No. 10. (2004), pp. 1113-1118.
    by RH Turner, RF Woods
    posted to fpga by Tunger on 2008-02-23 04:58:58 as **
  • Abstract Programming Architectures For Run-Time Reconfigurable Systems
    by Scott Hauck, Katherine Compton, Katherine Compton
    posted to fpga runtime-reconfigurable by tomhebbron on 2008-08-18 03:11:48 as **
  • Fast Regular Expression Matching using FPGAs
    (2001)
    by R Sidhu, V Prasanna
    posted to fpga regular_expression string_search by sunniesheu on 2007-03-23 05:29:48 as **
  • Exploiting Reconfigurable Hardware for Network Security
    Field-Programmable Custom Computing Machines, 2003. FCCM 2003. 11th Annual IEEE Symposium on (2003), pp. 292-293.
    by Shaomeng Li, Jim Torresen, Oddvar Soraasen
  • Security on FPGAs: State-of-the-art implementations and attacks
    Trans. on Embedded Computing Sys., Vol. 3, No. 3. (August 2004), pp. 534-574.
    by Thomas Wollinger, Jorge Guajardo, Christof Paar
    posted to architecture computer fpga security by sswanson on 2006-11-12 17:16:34 as ** along with 1 person Seenu
  • An FPGA Based Coprocessor for GLCM and Haralick Texture Features and their Application in Prostate Cancer Classification
    Analog Integrated Circuits and Signal Processing, Vol. 43, No. 2. (May 2005), pp. 205-215.
  • Methodology for high level estimation of FPGA power consumption
    Design Automation Conference, 2005. Proceedings of the ASP-DAC 2005. Asia and South Pacific, Vol. 1 (2005), pp. 657-660 Vol. 1.
    by V Degalahal, T Tuan
    posted to fpga by smithmc on 2007-04-24 23:16:34 as ** along with 1 person ceegrs2
  • Reconfigurable computing systems
    (2002)
  • A Performance Modeling and Analysis Environment for Reconfigurable Computers
    (1998), pp. 19-24.
    by Jeffrey Walrath, Ranga Vemuri
    posted to fpga performance reconfigurable by smithmc on 2008-01-07 14:20:17 as **
  • Balancing Interconnect and Computation in a Reconfiguable Computing Array (or, why you don't really want 100% LUT utilization)
    (1999), pp. 69-78.
    by Andre Dehon
    posted to fpga by smithmc on 2007-04-24 23:18:39 as ** along with 1 person gantlord
  • A re-evaluation of the practicality of floating-point operations on FPGAs
    FPGAs for Custom Computing Machines, 1998. Proceedings. IEEE Symposium on (1998), pp. 206-215.
    posted to fpga by smithmc on 2007-04-24 23:34:56 as ** along with 1 person gantlord
  • Hands-on computer architecture: Teaching processor and integrated systems design with FPGAs
    (2000)
    by Jan Gray
    posted to fpga by sharshera on 2007-06-09 19:34:08 as ** along with 1 person and 1 group fmc SCAL
  • Reconfigurable processor architectures
    (1996)
    by I Page
    posted to fpga hardware reconfigurable by seralus on 2007-04-27 19:35:56 as read
  • FPGAs vs. CPUs: trends in peak floating-point performance
    (2004), pp. 171-180.
    by Keith Underwood
    posted to applications fpga by Seenu on 2006-08-09 22:18:40 as ** along with 2 people gantlord jborn
  • Straight method for reallocation of complex cores by dynamic reconfiguration in Virtex II FPGAs
    Rapid System Prototyping, 2005. (RSP 2005). The 16th IEEE International Workshop on (2005), pp. 77-83.
    by YE Krasteva, AB Jimeno, de La, T Riesgo
    posted to fpga reconfigurable by Seenu on 2007-02-13 22:00:00 as **
  • Using PARBIT to Implement Partial Run-Time Reconfigurable Systems
    (2002), pp. 182-191.
    by Edson L Horta, John W Lockwood, S&\#233;rgio T Kofuji
    posted to fpga reconfigurable by Seenu on 2006-08-09 23:07:33 as **
  • Adaptive 2D feature detection using dynamic reconfiguration
    Reconfigurable Technology: FPGAs for Computing and Applications, Vol. 3844, No. 1. (1999), pp. 141-152.
    by Stephen M Charlwood, Philip, Richard L Walke
    edited by John Schewel, Peter M Athanas, Steven A Guccione, Stefan Ludwig, John T Mchenry
  • Aspects of dynamically reconfigurable logic
    Reconfigurable Systems (Ref. No. 1999/061), IEE Colloquium on (1999), pp. 1/1-1/5.
    by P Lysaght
    posted to fpga reconfigurable by Seenu on 2008-03-02 17:57:51 as ** along with 1 person gantlord
  • Dynamic hardware plugins in an FPGA with partial run-time reconfiguration
    Design Automation Conference, 2002. Proceedings. 39th (2002), pp. 343-348.
    by EL Horta, JW Lockwood, DE Taylor, D Parlour
    posted to fpga reconfigurable by Seenu on 2007-02-13 20:50:49 as **
  • A cost effective color gamut mapping architecture for digital TV color reproduction enhancement
    Consumer Electronics, IEEE Transactions on, Vol. 51, No. 1. (2005), pp. 168-174.
    by Dongil Han
    posted to color csc fpga image by Seenu on 2008-01-18 22:43:27 as ** along with 1 person peskin
  • Design and implementation of a high level programming environment for FPGA-based image processing
    Vision, Image and Signal Processing, IEE Proceedings-, Vol. 147, No. 4. (2000), pp. 377-384.
    posted to fpga image by Seenu on 2006-04-04 08:33:25 as **
  • Moats and Drawbridges: An Isolation Primitive for Reconfigurable Hardware Based Systems
    Security and Privacy, 2007. SP '07. IEEE Symposium on (2007), pp. 281-295.
    by Ted Huffmire, Brett Brotherton, Gang Wang, Timothy Sherwood, Ryan Kastner, Timothy Levin, Thuy Nguyen, Cynthia Irvine
    posted to fpga partial-reconfiguration reconfigurable by Seenu on 2008-02-28 00:13:04 as **
  • A face/object recognition system using FPGA implementation of coarse region segmentation
    SICE 2003 Annual Conference, Vol. 2 (2003), pp. 1552-1557 Vol.2.
    by T Nakano, T Morie, A Iwata
    posted to fpga object recognition segmentation by Seenu on 2006-02-23 22:06:38 as ** along with 1 person peskin
  • Implementing Photoshop Filters in Virtex
    (1999), pp. 233-242.
    by Stefan HM Ludwig, Robert Slous, Satnam Singh
    posted to applications csc fpga image by Seenu on 2006-08-03 19:38:09 as ** along with 1 person peskin
  • Mixed DSP/FPGA implementation of an error-resilient image transmission system based on JPEG2000
    Signals, Systems and Computers, 2001. Conference Record of the Thirty-Fifth Asilomar Conference on, Vol. 2 (2001), pp. 1330-1334 vol.2.
    posted to applications dsp fpga image by Seenu on 2006-08-09 22:19:33 as **
  • Implementing CSAT Local Search on FPGAs
    (2002), pp. 1156-1159.
    by Martin Henz, Edgar Tan, Roland HC Yap
    posted to applications fpga by Seenu on 2006-08-09 22:44:00 as **
  • Performance evaluation and optimal design for FPGA-based digit-serial DSP functions
    Computers & Electrical Engineering, Vol. 29, No. 2. (March 2003), pp. 357-377.
    by Hanho Lee, Gerald E Sobelman
    posted to applications dsp fpga by Seenu on 2006-09-20 18:46:30 as **
  • Hardware implementation for face detection on Xilinx Virtex-II FPGA using the reversible component transformation colour space
    Electronic Design, Test and Applications, 2006. DELTA 2006. Third IEEE International Workshop on (2006), 6 pp..
    posted to applications csc fpga by Seenu on 2006-08-01 22:08:33 as ** along with 1 person peskin
  • In-system partial run-time reconfiguration for fault recovery applications on spacecrafts
    Systems, Man and Cybernetics, 2005 IEEE International Conference on, Vol. 4 (2005), pp. 3952-3957 Vol. 4.
    by Will H Zheng, NI Marzwell, SN Chau
    posted to fpga reconfigurable by Seenu on 2007-02-13 22:00:55 as **
  • Implementation of the JPEG 2000 Standard on a Virtex 1000 FPGA
    (2002), pp. 503-512.
    by Alexander Staller, Peter Dillinger, Reinhard Männer
    posted to fpga image by Seenu on 2006-08-09 22:27:06 as **
  • REPLICA: A Bitstream Manipulation Filter for Module Relocation in Partial Reconfigurable Systems
    Parallel and Distributed Processing Symposium, 2005. Proceedings. 19th IEEE International (2005), pp. 151b-151b.
    by H Kalte, G Lee, M Porrmann, U Ruckert
    posted to fpga reconfigurable by Seenu on 2007-02-13 21:26:48 as **
  • Reconfigurable hardware control software using anonymous libraries
    Field-Programmable Technology, 2002. (FPT). Proceedings. 2002 IEEE International Conference on (2002), pp. 426-428.
    posted to fpga reconfigurable by Seenu on 2006-08-09 22:19:58 as **
  • System-on-programmable-chip approach enabling online fine-grained 1D-placement
    Parallel and Distributed Processing Symposium, 2004. Proceedings. 18th International (2004), 141.
    posted to fpga reconfigurable by Seenu on 2007-02-13 22:02:22 as ** along with 1 person mmuecke
  • Accelerating matrix product on reconfigurable hardware for image processing applications
    Circuits, Devices and Systems, IEE Proceedings [see also IEE Proceedings G- Circuits, Devices and Systems], Vol. 152, No. 3. (2005), pp. 236-246.
    posted to csc fpga image by Seenu on 2006-07-25 00:21:45 as ** along with 1 person peskin
  • The microarchitecture of FPGA-based soft processors
    (2005), pp. 202-212.
    by Peter Yiannacouras, Jonathan Rose, Gregory J Steffan
    posted to applications fpga by Seenu on 2006-08-09 22:18:42 as **
  • An FPGA-based custom coprocessor for automatic image segmentation applications
    FPGAs for Custom Computing Machines, 1994. Proceedings. IEEE Workshop on (1994), pp. 172-179.
    by GJ Gent, SR Smith, RL Haviland
    posted to fpga image segmentation by Seenu on 2006-02-23 22:01:29 as ** along with 2 people peskin dhruvpanchal
  • An FPGA run-time system for dynamical on-demand reconfiguration
    Parallel and Distributed Processing Symposium, 2004. Proceedings. 18th International (2004), 135.
    by M Ullmann, M Huebner, B Grimm, J Becker
    posted to fpga reconfigurable by Seenu on 2006-06-06 22:17:28 as **
  • DAGGER: A Novel Generic Methodology for FPGA Bitstream Generation and Its Software Tool Implementation
    Parallel and Distributed Processing Symposium, 2005. Proceedings. 19th IEEE International (2005), pp. 165b-165b.
    posted to fpga reconfigurable by Seenu on 2007-02-13 21:29:22 as **
  • Configuration compression for FPGA-based embedded systems
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, Vol. 13, No. 12. (2005), pp. 1394-1398.
    posted to computing embedded fpga by Seenu on 2006-04-13 20:58:30 as **
  • Real-time color gamut mapping method for digital TV display quality enhancement
    Consumer Electronics, IEEE Transactions on, Vol. 50, No. 2. (2004), pp. 691-698.
    by Dongil Han
    posted to color csc fpga image by Seenu on 2008-01-18 22:24:03 as ** along with 1 person peskin
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